VEST is the world's first and only family of 160-bit to 512-bit symmetric key cryptosystems targeted from its conception solely for semiconductor and multi-factor hardware authentication applications.

VEST-4 (160-bit key, 80-bit security) is fast and efficient, performing single-pass authenticated encryption at least 3x faster and 3x more efficiently than ECRYPT's selection of 128-bit key AES ciphers (regardless of mode-of-operation) in ASIC. Furthermore, VEST-4 is not only the worlds smallest collision-resistant hash function in hardware (6k gates) it is also the most hardware friendly design for constrained environments, accepting 1 to 8 bits of data to hash per clock cycle (as opposed to 512 bits per invocation of SHA). VEST is an ideal replacement for area constrained applications currently using broken hardware ciphers or where collision-resistant hash functions such as SHA are too large.

VEST hardware-dedicated technologies comprehensively address pressing real-world security problems that cannot be solved using software-efficient cryptographic technologies such as AES:

• Only VEST enables the fabless semiconductor company to directly combat piracy and cloning in standard cell ASIC technologies by securely generating an arbitrary number of unique stream ciphers with unique combinatorial logic for every device implemented using a published cryptographic process using an additional 256-bit key; and
   
• Only VEST offers a patent-pending authentication process that resists multi-GHz general-purpose software processors masquerading as hardware authentication tokens; achieving an entirely new class of risk management for hardware tokens such as RFID devices and smartcards; and
   
• Only VEST integrates single-pass authenticated encryption with collision-resistant hashing in a single module; achieving over 90% logic reuse for the three (encrypt, message authentication code, hash) traditionally independent cryptographic operations; and
  

VEST offers the worlds most robust cryptosystem for highly constrained environments such as RFID, NFC, digital cash, National ID cards and e-passports. In identification projects that must use AES and SHA, the VEST cryptosystem can be securely used to perform an additional enhanced authentication step to validate the token.

Naturally, VEST also enables ubiquitous chip-level security to protect against IP theft and to ensure the correct operation of commodity devices.

The VEST cryptosystem has been researched and developed on a full-time commercial basis for over three years to deliver exceptional performance across all dimensions in hardware. For example:

• VEST security margins far exceed those of all published hardware-dedicated ciphers (such as the A5/1, Texas Instruments DST, E0, Grain, Achterbahn, GPRS, Lili-x, Trivium) and trusted software ciphers such as (DES, AES); and
   
• VEST delivers minimal commercial (160-bit key/hash, 80-bit security in 6k gates) through to the industry recommended levels of protection (512-bit key/hash, 256-bit security in 23k gates) for medical and mainstream commercial applications in constrained environments; and
   
• VEST uniquely combines the theoretical certainty of linearly combined (N)LFSR style stream ciphers with co-prime periods behind the protection of a large stateful accumulator employing massive combinatorial complexity traditionally found only in block-ciphers; and
   
• VEST achieves a tiny chip footprint by using cryptographic operations that have a more compact representation in hardware than general-purpose software operations.

Although exacting comparisons between cipher offerings can only be performed in the context of hand-tuned cryptosystem implementations tailored for a specific hardware circuit ensuring equivalent security ratings with normalised security margins, it is fair to generalise that VEST consistently outperforms all published AES and SHA cipher implementations in hardware by a very large margin. This can be ascertained quickly for your project by exploring our extensive and detailed online survey of over 90 different reputable AES and SHA hardware implementations.

VEST specifications and our claims about VEST are published for both global cryptographic and hardware design and synthesis analysis by ECRYPT – the European Network of Excellence for Cryptology eSTREAM stream cipher competition. Furthermore, the VEST cryptosystem stands, after sixteen months of global cryptographic scrutiny, as one of the very few submissions with an unchallenged security record in the eSTREAM competition.

Synaptic Laboratories Ltd was elected to a position on the board of management of the Secure Electronic Transaction (Pole-TES) collaboration group in Caen, France. Pole-TES advises and coordinates development on many important industry relevant projects. Security chiefs and their respected teams in several global corporations advise us that they have studied VEST ciphers with some astonishment, noting how VEST is the first cipher to concentrate so many features with so much complexity in such a small low-power circuit.

Previously, secure on-chip cryptosystems were not commercially viable for the vast majority of commodity semi-conductor projects.  The need to combine different modules and associated chip resource demands with increased implementation complexity to create a specific on-chip cryptosystem were added costs and risks that many projects could not accept. Repeatedly, trivially insecure, minimal circuit-area cryptosystems have been offered as international standards under the guise of offering commercial grade security.  The public outcry and loss of face of these broken systems continues to have serious market ramifications.

History has proven insecure ciphers lower consumer confidence in the trustworthiness of allegedly secure products and services along with exasperating a wide range of piracy, software emulation and cloning problems. 

The absence of good affordable cryptographic protection led to a reliance upon second-level protection strategies such as anti-tampering and expensive legal processes. The published attacks against so called tamper resistant chips, ePassports and Near Field Communication (NFC) devices are undisputed.  Furthermore the published estimates of IP theft exceeding USD250 billion in one month also demonstrate that the industry needs more practical and commercially viable preventative solutions.

Today, VEST overcomes previously intractable barriers, offers reduced NRE and enables smaller, cheaper and cooler chips compared with traditional cryptographic solutions. Embedding VEST correctly on your chip has many commercial benefits. Beyond the obvious protection of sensitive data, VEST can extend device functionality by offering features that address regulative commercial security obligations, increase consumer confidence, market appeal and extend income streams. Only VEST can provide a new level of protection for compromised hardware authentication devices.

Genuinely secure cryptography can reduce stakeholder risk in your current projects.

You will not want to be the last company to leverage the commercial advantages of VEST.

Rely on VEST's precision engineering, outstanding performance and unchallenged reputation for high-security to support your most demanding hardware security requirements today!